The escalating requirements for high densification and performance associated with ultra-large scale integration semiconductor devices requires design features of less than about 0.32 microns, including 0.30 microns and under, e.g., 0.25 microns and under, increased transistor and circuit speeds, high reliability and increased manufacturing throughput for competitiveness. The reduction of design features to 0.32 microns and under generates numerous problems challenging the limitations of conventional semiconductor manufacturing technology. Moreover, as design features are reduced below 0.32 microns, processing effects which were either not apparent or of little impact on device performance become apparent and/or adversely impact device performance, thereby generating an unacceptable rejection rate.
For example, it was found that in manufacturing flash memory devices, deposited metal silicide films, such as tungsten silicide, exhibit discontinuities, crevices and/or experience lifting or delamination during subsequent thermal processing. Such defects were not apparent and/or significant until the design rule reached submicron dimensions, such as less than about 0.32 microns.
Conventional methodology in manufacturing flash memory semiconductor devices comprises depositing, as by chemical vapor deposition (CVD), a metal silicide film, such as a tungsten silicide film, on a conductive layer, such as polycrystalline silicon, e.g., a word line. The tungsten silicide layer is conventionally deposited at a temperature of about 360.degree. C., has an as deposited silicon/tungsten ratio of about 2.6-2.7 and is substantially amorphous. Subsequently, a capping layer is deposited at a temperature greater than that employed for CVD of the tungsten silicide film. For example, conventional methodology in manufacturing flash NOR semiconductor devices comprises depositing a polycrystalline silicon capping layer at a temperature of about 600.degree. C. Conventional methodology for manufacturing flash NAND semiconductor devices comprises depositing a silicon nitride capping layer at a temperature of about 400.degree. C. Such capping layers are conventionally deposited on a tungsten silicide film to maintain the stability of the tungsten silicide film in place and to provide a source of silicon for saturation of the tungsten silicide film, thereby enhancing etch selectivity.
As the design rule shrinks to 0.32 microns and under, discontinuities, such as crevices in and/or lifting of the deposited tungsten silicide films occurred. These defects were not previously apparent and/or did not previously adversely affect device performance until processing device features with submicron dimensions, e.g., a tungsten silicide film having a thickness of about 0.32 microns and under.
Accordingly, there exists a need for semiconductor technology which enables the manufacture of flash memory devices with submicron features, particularly features below 0.32 microns, comprising capped metal silicide films on conductive layers, such as capped tungsten silicide films, exhibiting high reliability.